This invention relates to automated manufacturing of integrated circuits, and more particularly to a method of utilizing automated process control to characterize and implement both new generation processes and existing generation processes.
The process of manufacturing an integrated circuit is highly complex and requires hundreds of process steps to convert a semiconductor material to a working integrated circuit. To implement an integrated circuit manufacturing process, enormous capital expenditures are required to build the manufacturing facility (a xe2x80x9cfabxe2x80x9d). In addition, to remain competitive in the marketplace a manufacturer of integrated circuits must rapidly develop new generations of design and process technologies. For example, present turnaround time for DRAM type technology is three years or less. Accordingly, process development time is a critical factor in such environments, and thus, the development and transfer of newly developed technology to volume manufacturing should be as rapid as possible. Further, once a new technology has reached volume production, there remains a need for optimizing the efficiencies of the manufacturing operation in order to obtain the highest process yields possible. The inventors herein have observed that a need exists for a method of systematically developing new manufacturing technology and systematic methods to apply such technology to a high volume manufacturing operation. The inventors herein have also observed that a need exists for a method for improving the efficiencies of the manufacturing technology even after the technology has been implemented in a manufacturing operation.
The present invention provides an improved method of utilizing automated process control techniques to characterize and implement both new and existing generation integrated circuit manufacturing processes.
In one broad respect, this invention provides a method for the systematic development of integrated chip technology. The method may include obtaining empirical data relating to process variables of an existing integrated circuit manufacturing process to characterize the existing integrated circuit manufacturing process and extrapolating, with a logic based computer system, the existing data to a new process technology to assess and calculate variations between the known process and a new integrated circuit manufacturing process. The method may further include determining potential yields of the new process and adjusting process variables of the new process to conform to a desired yield model through the use of the logic based computer system. Generally, the process parameters chosen for adjustment will be those parameters that are determined to significantly affect the manufacturing process and quality of integrated circuits made by the process.
In another broad respect, this invention is a method for developing a new integrated circuit fabrication process. The method may comprise selecting a known integrated circuit fabrication process defined by a given set of design rules, identifying key process steps use in the known process and comparing the known process design rules with design rules for the new integrated chip fabrication process. The method may further include preparing a statistical model for the new fabrication process and defining factors causing potential yield loss in the new process. The method may further include defining control limits on the potential variations in the new integrated circuit fabrication technology based on known the process, computing shifts in yield in the new process due to the potential variations in the process variables of the new integrated circuit fabrication technology and adjusting the control limits to improve yield. In certain embodiments, the method may also comprise repeating at least some of the steps of the method to achieve the desired yield. The selection of control limits for selected process parameters will typically be based on 6-sigma statistical limits of known variations from the known process.
In a third broad respect, this invention is a system useful for manufacturing an integrated circuit. The system may include a plurality of process tools used in making the integrated circuit. Further, the system may include a logic based computer system and process control software installed in or coupled to each manufacturing tool, the computer system and control software monitoring and controlling the operation of at least some of the tools, wherein process variables of a plurality of downstream process tools are automatically adjusted by the computer system and control software to improve integrated circuit yield based on a comparison of previously obtained process variables occurring from one or more upstream process tools. In addition, the system may include lines for networking the computer system to a plurality of the process tools.
In yet another broad respect, a process useful for the manufacture of an integrated circuit is provided. The process may include introducing a semiconductor substrate into a manufacturing line used to make an integrated circuit and processing the substrate using process tools of the manufacturing line. In addition, the process may include obtaining first process data relating to the processing of the first substrate through at least a first process tool, identifying variations in the first process data as compared to desired first process data, and automatically adjusting through a logic based computer system one or more process variables of at least a first downstream process tool in order to compensate for the identified variation.
Representative examples of process output data or variables monitored may include those related to thickness, surface and design defects, reflectivity, etch rates, polish rates, photolithographic characteristics, electrical characteristics, tool characteristics, etc. Non-uniformities may be monitored within a wafer, wafer to wafer, and run to run. In some methods, the relationship between yield and selected process parameters will fit into a polynomial, such as Y(yield)=A1+A2X1+A3X22+ . . . AnXnxe2x88x921nxe2x88x921 wherein the distribution of each term AnXnxe2x88x921 is determined where AnXnxe2x88x921 for a given process step is the acceptable variation (f(x)) of previous and future steps.
It should be appreciated that the methods of this invention are largely empirical in nature, since response parameters are collected from previous generation IC manufacturing technology and are then applied to the new generation IC technology. The methods herein are useful in a variety of manufacturing operations. For example, the methods are useful in the manufacture of integrated circuit memories, such as for example, DRAM products. Representative examples of well known IC technology from which models for new technology can be extrapolated from includes 0.25 micron DRAM technology, 0.18 micron DRAM technology or other generations of technology.
The present invention provides significant advantages in a manufacturing operation where time for development and implementation of new technology is limited. For example, this method enables new IC technology to be converted into a volume manufacturing operation in reduced time relative to present methods used to design and implement new process technology. Furthermore, this invention reduces scrap, misprocessing and the like, which are commonly associated with converting a new IC manufacturing technology into a commercially viable high-volume manufacturing process.